This invention relates to a charge pump circuit having a number of voltage boosting stages. In particular, it relates to a charge pump circuit using diodes as the switches within the boosting stages of the circuit. The invention also relates to electronic devices including such a circuit, particularly but not exclusively, large-area electronic (LAE) devices such as an active matrix liquid crystal display (AMLCD) or another type of active matrix display. A semiconductor device or semiconductor integrated circuit is another device form, in which the charge pump circuit may, for example, be integrated.
Charge pump circuits are known for providing a boosted DC voltage from a lower DC voltage supply. The boosted voltage may be more positive than the high level of the input supply voltage or, alternatively, more negative than the low level of the input supply voltage. Such circuits may comprise a series of voltage boosting stages which each include a switch connected to a capacitor, the switch controlling the flow of charge onto the capacitor. Such a circuit is disclosed in published European patent application EP-A-0 813 290. The switch of each stage is provided at the input of the stage, and the output of each stage is the junction between the switch and capacitor. The input to the circuit is a DC current supply at the lower voltage magnitude. The capacitors are connected alternately to one of two complementary clocked control lines which control the switching operation, which in turn controls the so-called pumping of charge along the series of stages.
During operation of the circuit, one clock cycle causes a charge stored on the capacitors connected to one of the control lines to be passed to the capacitors of the respective next stage. The voltage across the capacitors increases progressively along the series of voltage boosting stages. A larger number of stages leads to a larger output voltage for the circuit. The performance of a charge pump is determined by a number of factors including limitations in the performance of the switch. Two primary limiting factors associated with the switch are the on-state resistance and parasitic capacitance. A higher performance charge pump will be more efficient and thus consume less power. The charge pump circuit of EP-A-0813290 operates in this manner, using transistors as the switching devices. One example of an application of charge pump circuits is in portable electronic devices having display screens. A relatively high voltage is needed for the display, for example 15V, whereas the device is to be powered by a relatively low voltage supply, for example 3 V. The use of a voltage boosting device such as a charge pump circuit is clearly appropriate.
In active matrix liquid crystal displays, there is a trend towards the use of low temperature poly-silicon (LTPS) thin film processes. Such displays typically incorporate thin film transistors (TFT""s) as the switches for the active matrix switching array. The control signals needed to drive low-temperature poly-Si TFTs must be at least comparable to and preferably greater than the threshold voltage of the TFT which is typically 3-6V. This makes it difficult to design an efficient charge pump using only LTPS TFTs.
According to the present invention, there is provided a charge pump circuit comprising a series of voltage boosting stages, each stage comprising a switching means and a capacitive element connected in series between the input to the stage and a respective voltage control terminal, the output from each stage comprising the node between the switching means and the capacitive element, wherein the voltage control terminals comprise at least two groups of terminals receiving respective timed control voltages, wherein adjacent stages are associated with different terminal groups, and wherein the switching means of one or more stages comprises a lateral PIN junction diode.
The use of diodes enables the charge pump circuit itself to operate from a lower supply voltage than is possible with the use of TFTs. The use of lateral PIN diodes enables the charge pump circuit to be formed using the same thin-film processing as may be required for other elements of the circuit or device to which the boosted voltage is supplied. This enables the charge pump circuit to be formed on a common substrate with, for example, higher voltage TFT circuitry. For example, this allows a charge pump circuit of the invention to be integrated with thin-film circuit elements of the low temperature poly-silicon (LTPS) type, in an AMLCD. It also allows the charge pump circuit to be formed with a poly-silicon film on an insulating layer of a bulk semiconductor device, for example in integrated control circuitry of a power MOSFET.
The voltage control terminals preferably comprise two groups of terminals, and the control voltages then comprise a first clocked control voltage for one group and a second complementary clocked control voltage for the other group.
The or each lateral PIN junction diode preferably comprises a gate electrode for allowing an electric field to be applied to the intrinsic region of the diode, to selectively increase the conductivity of the diode. The gate can be capacitively coupled to the intrinsic region via an intermediate dielectric. This increased conductivity gives rise to both a reduction in the on-state resistance (i.e. cathode-anode resistance in forward bias) and a reduction of the turn-on voltage, corresponding to the forward bias voltage drop, of the diode.
Reduction of the on-state resistance of the diode enables a higher output voltage to be achieved with a given number of voltage boosting stages. Reduction of the turn-on voltage enables the construction of a charge pump circuit which may be used with a further reduced supply voltage.
Reduction of the on-state resistance and turn-on voltage of the diode results in an improvement in efficiency and enables a higher output voltage to be achieved with a given number of boosting stages.
If the intrinsic region of the PIN diode is doped weakly n-type then the gate electrode should preferably be biased to a voltage that is at least equal to the voltage at the anode of the diode during forward bias. This will increase the conductivity of the intrinsic region when the diode is forward biased. However, it is also desirable to minimise the effect of the shunt capacitance between the anode and the cathode of the diode. In choosing the optimum node in the circuit to which the gate should be connected, there can be a trade-off between reduced resistance and increased shunt capacitance.
Preferably, if the intrinsic region is weakly n-type and the charge pump is designed to generate a positive boosted voltage, the gate electrode is connected to the output of a voltage boosting stage ahead in the series. This ensures that the electrode voltage is higher than the voltage at the anode of the diode. The charge flowing to the shunt capacitance is then not derived from the input signal to the stage. The electrode is preferably connected to the output of a voltage boosting stage which is associated with the same group of voltage control terminals.
Preferably the PIN junction diode is a polycrystalline silicon (poly-silicon) device, the poly-silicon material being provided at low temperature.
The invention also provides an integrated circuit device or other electronic device which may be formed using, for example, low temperature poly-silicon processing and which includes a charge pump circuit of the invention. The device may comprise an active matrix liquid crystal display device, with the charge pump circuit and a TFT switching array for the display being provided on a common substrate.